Hereinafter, a configurational example of a conventional three-phase PWM inverter is explained referring to figures.
A circuit block diagram that illustrates a configuration of the three-phase PWM inverter for drive-controlling a conventional three-phase ac motor is represented inside broken lines in FIG. 20 (for example, refer to pages 2-3, and FIG. 4 in Japanese Laid-Open Patent Publication 298,633/1995). It is well known that a three-phase ac motor has three phases referred to as a U-phase, V-phase, and W-phase. When driving these three phases by an inverter device, a control circuit controls their operations by outputting respective PWM signals for each phase. A three-phase PWM-signal generating circuit 1 outputs PWM signals based on a reference frequency and effective voltage of a three-phase ac voltage waveform (PWM waveform) supplied into a motor 2; thus, each of the outputted signals is transmitted to six gate drive circuits 3a, 3b, 3c, 3d, 3e, and 3f, and the output is also connected to each gate terminal of six insulated gate bipolar transistors (hereinafter referred to as IGBTs) 4a, 4b, 4c, 4d, 4e, and 4f that are a switching device. Each of six diodes 5a, 5b, 5c, 5d, 5e, and 5f is connected in antiparallel to each IGBT. A main power supply 6 is a dc source for supplying electric power to the motor 2, being practically approximately 140 V dc power rectified and then smoothed from 100 V ac power, or 280 V dc power rectified and then smoothed from 200 V ac power, is generally used; however, the main power supply is simply represented by a battery symbol in the figure. A capacitor 7 is connected in parallel to the main power supply 6. The collector terminals of the high-side IGBTs 4a, 4b, and 4c are connected to the positive-electrode-side terminal of the main power supply 6, meanwhile the emitter terminals of the low-side IGBTs 4d, 4e, and 4f are connected to the negative-electrode-side terminal of the main power supply 6. Moreover, the emitter terminal of the IGBT 4a is connected to the collector terminal of the IGBT 4d, and an output terminal U is wired for connecting the connecting point with the motor 2. Similarly, the emitter terminal of the IGBT 4b is connected to the collector terminal of the IGBT 4e, and an output terminal V is wired for connecting the connecting point with the motor 2; moreover, the emitter terminal of the IGBT 4c is connected to the collector terminal of the IGBT 4f, and an output terminal W is wired for connecting the connecting point with the motor 2.
An operation of a three-phase PWM inverter configured such as that is explained using FIG. 21. FIG. 21 is a signal-waveform representing the operation of the three-phase PWM-signal generating circuit 1. The three-phase PWM-signal generating circuit 1 creates modulated signals EU, EV, and EW that are three-phase sine waves in which the phase has been shifted 120 degrees each other; then, generates PWM signals UPO, VPO, WPO, UNO, VNO, and WNO (only PWM signals UPO, VPO, and WPO are represented in FIG. 21) that are transmitted into the gate drive circuits 3a, 3b, 3c, 3d, 3e, and 3f, respectively, after comparing the modulated signals to an triangular carrier signal EC. Here, the PWM signals UPO, VPO, and WPO for driving the high side, and the PWM signals UNO, VNO, and WNO for driving the low side are in a relationship of logical inversion, respectively; thereby, on/off operations are alternately performed by each of the high-side IGBTs 4a, 4b, and 4c, and the corresponding low-side IGBT among 4d, 4e, and 4f. Thereby, the output terminals U, V, and W are alternately switched to the positive-electrode terminal and the negative-electrode terminal of the main power supply 6; then, the motor 2 connected to the terminals is driven. Practically, because the PWM signals UPO, VPO, and WPO for driving the high side, and the PWM signals UNO, VNO, and WNO for driving the low side are not in a relationship of simple logical inversion, in order to prevent load-short-circuiting caused by those upper and lower arms simultaneously coming into on-state in a transient period of the switching operation, a deadline is usually provided; however, the discussion is omitted here, because this matter is not concerned with the essence of the present invention.